ATR statistics: TA2 - Global, specific mode byte

Article from the series "ATR statistics"

TA2 - Global, specific mode byte

The ISO 7816-3 specification is not public. So I can't copy/paste part of the text. I will use Wikipedia instead.

From Wikipedia https://en.wikipedia.org/wiki/Answer_to_reset#Interface_byte_TA2

Interface byte TA₂, if present, is global, and is named the specific mode byte.

Presence of TA₂ commands that the reader use specific mode as defined by TA₂ and earlier global bytes, rather than negotiable mode when TA₂ is absent.

TA₂ encodes in its 4 low-order bits an integer T defining the protocol required by the card, in the convention used for TD₁ (EMV prescribes that a card which T encoded in TA₂ does not match that in TD₁ shall be rejected).

The 5th bit is 0 to encodes that the required ETU duration is F_i/D_i clock cycles as defined by TA₁ (or its default value if absent); or 1 to indicate that the ETU duration is implicitly known (by some convention, or setting of the reader; EMV prescribes that such card shall be rejected).

The 6th and 7th bit are reserved for future use; 0 indicates not used.

The 8th bit is 1 to indicate that the card is unable to change the negotiable/specific mode (that is, does not propose other settings); or 0 to indicate that card has that ability (perhaps after a warm ATR).

Historical note: Provision for specific mode did not exist in ISO/IEC 7816-3:1989. Back then, the interface character TA₂ had no particular name or function, and was specific (to the protocol introduced by TD₁). ISO/IEC 7816-3:1997 introduced the specific mode and the specific mode byte, with interim note helping cards with specific mode byte TA₂ in their ATR dealing with a reader that did not implement specific mode.

TA2	#	%
	1983	95.70 %
0x81	48	2.32 %
0x80	31	1.50 %
0x00	10	0.48 %

TA₂ is used by only 4.30% of cards. 95.70% of smart cards in my list have no TA₂ defined.

• 0x81 indicates "Protocol to be used in spec mode: T=1 - Unable to change - defined by interface bytes".
• The 4 low-order bits are set to 0001b so T=1 protocol.
• The 8th bit set to 1 to indicate unable to change the negotiable/specific mode
• 0x80 indicates "Protocol to be used in spec mode: T=0 - Unable to change - defined by interface bytes"
• The 4 low-order bits are set to 0000b so T=0 protocol.
• The 8th bit set to 1 to indicate unable to change the negotiable/specific mode
• 0x00 indicates "Protocol to be used in spec mode: T=0 - Capable to change - defined by interface bytes"
• The 4 low-order bits are set to 0000b so T=0 protocol.
• The 8th bit set to 0 to indicate the card is able to change the negotiable/specific mode